PX14400D-SP – Xilinx Virtex-5 SXT FPGA DSP DC Coupled High-Speed Digitizer Board
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- Customizable Xilinx Virtex-5 SXT FPGA DSP
- Virtex-5 SX50T FPGA option provides 52,224 logic cells / 4,752 kbits block RAM / 288 DSP slices
- Virtex-5 SX95T FPGA option provides 94,208 logic cells / 8,784 kbits block RAM / 640 DSP slices
- FPGA DSP Packages with Fixed Capabilities for FFT, FIIR filtering, DDC Real-Time Processing
- FPGA DSP Packages with Programmable Capabilities to allow for User Implementation of Custom In-Line DSP
- 2 DC-Coupled Analog Channels at up to 400 MHz Sample Rate per Channel
- 14 Bits of A/D Resolution
- Bandwidth from DC to 200 MHz
- 1 GB RAM (512 MB for Raw Data Capture / 512MB for FPGA Processing)
- 1400 MB/s Continuous Transfer Over PCI Express Bus (8 lanes)
Signatec's PX14400D-SP digitizer enables users to add customized digital signal processing into the output data flow via Xilinx® Virtex FPGAs. Standard development environments can be used to program for this device, such as Xilinx ISETM and System Generator with MATLAB software tools.
Signatec designed the PX14400D-SP to utilize the Virtex-5 SXT, delivering the following processing performance options of:
- PX14400D-SP50 = Virtex-5 SX50T: 52,224 logic cells / 4,752 kbits block RAM / 288 DSP slices.
- PX14400D-SP95 = Virtex-5 SX95T: 94,208 logic cells / 8,784 kbits block RAM / 640 DSP slices.
Signatec's PX14400D-SP FPGA firmware development kits are available with either fixed real-time DSP capabilities for FFT, FIIR filtering, and DDC processing or for custom programming by the user. FPGA packages that allow for custom programming includes a programmer's manual that provides detailed information needed to create and download user defined firmware to the PX14400D-SP along with hooks and source code examples to simplify this task. Xilinx ISE software version 10 or higher is required for customers creating custom logic.
The PX14400D-SP is a dual channel waveform capture board that provides a combination of high speed and high resolution sampling along with a very large memory capacity. This board is a companion to Signatec's PX14400A-SP and is intended primarily for applications that require DC capability. The PX14400D-SP has two input voltage ranges versus the PX14400D2-SP model that has six input voltage ranges. The analog input bandwidth is set to 200 MHz via 3-pole Bessel filters on each input channel.
The PX14400D-SP has a primary sample-data RAM bank of 512 MB memory that may be used as an exceptionally large FIFO for acquiring non-stop, continuous data directly to either the PCI Express (PCIe) bus or the SAB. In Buffered Acquisition Mode (where the 512 MB RAM FIFO is used) the PX14400D-SP is capable of sustaining 1400 MB/s over the PCIe bus. Significant test data has shown that recording with large FIFO buffering can be continuous at these rates even when operating in traditional non real-time environments such as the Windows operating system.
The PX14400D-SP has 2 selectable-gain voltage ranges for each channel. The full scale voltages are 1.2 volts and 400 millivolts. Inline 6dB attenuators are available that effectively change the levels to 2.4 volts and 800 millivolts. The DC offset for each channel is individually adjustable via 12-bit DACs. The adjustment range is sufficient so that the input voltage span can be set for unipolar positive, unipolar negative, bipolar, or any value in between.
A frequency synthesized clock allows the ADC sampling rate to be set to virtually any value from 20 to 400 MHz (except 277 MHz to 308 MHz), offering maximum flexibility for sampling rate selection. This frequency selection flexibility comes at no cost to the acquisition clock quality/performance when locked to either the onboard 10 MHz, 5 PPM reference clock or to an externally provided 10 MHz reference clock. The ADC may also be clocked from an external clock source.
Multiple PX14400D boards may be interconnected in a Master/Slave hardware configuration via a ribbon cable that connects at the top of the boards. In this configuration, the Master board drives the clock and trigger signals for the Slave boards so that data sampling on all boards occurs simultaneously. Up to five boards can be connected for sampling rates up to 270MHz. Up to three boards can be connected for sampling rates up to 400MHz.
PX14400D (DC-Coupled) Full Data Sheet
Update: Revision 1.01 - 04/03/2012
File Size: 538 KB
|External Signal Connections|
|Analog Input, Channel 1:||SMA|
|Analog Input, Channel 2:||SMA|
|Digital Input / Output:||SMA|
|Full Scale Voltage Ranges:||400 mV, 1.2V|
|Bandwidth:||DC - 200 MHz (Bessel filter)|
|SNR (1-200 MHz):||67 dB|
|SFDR (@ 25 MHz):||80 dB|
|SFDR (@ 100 MHz):||73 dB|
|Signal Type:||digital, TTL signal level|
|Internal Synthesized Clock|
|Frequency Range:||20.0 - 400 MHz|
|Resolution:||better than 10 PPM|
|Accuracy:||better than 5 PPM|
|Unsettable Ranges:||277-308 MHz|
|Signal Type:||sine wave or square wave|
|Frequency:||20 MHz to 400 MHz|
|Amplitude:||100 mV p-p to 2.0 V p-p|
|Post ADC Clock Divider|
|Divider Settings:||1, 2, 4, 8, 16, 32|
|Internal:||10.0 MHz, +/- 5 ppm max.|
|External:||10.0 MHz, +/- 50 ppm max (required for lock)|
|Digital Input / Output|
|Type:||TTL Logic Level (standard)|
|Max. Frequency:||200 MHz|
|Connection:||50 ohms to FPGA I/O|
|Post Trigger:||single start trigger fills active memory|
|Pretrigger:||single trigger stops acquisition|
|Segmented:||start trigger for each memory segment|
|Pretrigger Samples:||samples prior to trigger are stored; Single Channel: 8k max.; Dual Channel: 4k max per channel|
|Delayed Trigger:||delay from trigger to data storage; Up to 64k digitizer clock cycles|
|Total Size:||512 Megasamples; split 50/50 for raw sample data capture and FPGA data processing|
|Segment Size:||Up to 128 Megasamples|
|Segment Re-Arm Time:||150 nanoseconds|
|Addressing:||DMA transfers from starting address|
|+12V:||1.0 Amps max.|
|+3.3V:||3.3 Amps max.|
|Absolute Maximum Ratings|
|Analog Inputs:||+/- 4 volts|
|Trigger Input:||-0.2 to +4.0 volts DC|
|Clock Input:||5 volts peak to peak|
|Operating Temperature:||+32 to +122F / 0 to +50C|
|Storage Temperature:||-4 to +158F / -20 to +70C|
|Operating Relative Humidity:||10% to 90%, non-condensing|
|Operating Vibration:||0.25 G, 5 Hz to 500 Hz|
|Operating Shock:||2.5 G, 11 ms, 1/2 sine|
|Board Dimensions:||7.5” L x 4.3” H x 0.75” W /
19.0cm L x 10.9cm H x 1.9cm W