PX14400-SP – Xilinx Virtex-5 SXT FPGA DSP High-Speed Digitizer Board

Signatec's PX14400-SP digitizer enables users to add customized digital signal processing into the output data flow via Xilinx® Virtex FPGAs.  Standard development environments can be used to program for this device, such as Xilinx ISETM and System Generator with MATLAB software tools.

Signatec designed the PX14400-SP to utilize the Virtex-5 SXT, delivering the following processing performance options of:

Processed data results can be sent to the PC or across the PX14400-SP SAB bus to other system device.

Signatec's PX14400-SP FPGA firmware development kits are available with either fixed real-time DSP capabilities for FFT, FIIR filtering, and DDC processing or for custom programming by the user. FPGA packages that allow for custom programming includes a programmer's manual that provides detailed information needed to create and download user defined firmware to the PX14400-SP along with hooks and source code examples to simplify this task. Xilinx ISE software version 10 or higher is required for customers creating custom logic.

The PX14400-SP is a dual channel waveform capture board that provides a remarkable combination of high speed and high resolution sampling along with a very large memory capacity. Signal frequencies up to 200 MHz can be accurately captured when using the programmable gain amplifier or up to 400 MHz if the direct transformer coupled connection is used.

The entire 1 GB memory may be used as an exceptionally large FIFO for acquiring non-stop, continuous data directly to either the PCI Express (PCIe) bus or the SAB. In Buffered Acquisition Mode (where the 1 GB RAM FIFO is used) the PX14400-SP is capable of sustaining 1400 MB/s over the PCIe bus. Significant test data has shown that recording with large FIFO buffering can be continuous at these rates even when operating in traditional non real-time environments such as the Windows operating system.

The PX14400-SP was designed to maximize the quality of the captured signal in terms of signal-to-noise ratio and spurious-free dynamic range over a very wide frequency range. The programmable amplifier allows for setting the full scale input voltage from 200 millivolts to 3.0 volts in 1 dB steps.

A frequency synthesized clock allows the ADC sampling rate to be set to virtually any value from 58 to 400 MHz, offering maximum flexibility for sampling rate selection. This frequency selection flexibility comes at no cost to the acquisition clock quality/performance when locked to either the onboard 10 MHz, 5 PPM reference clock or to an externally provided 10 MHz reference clock. The ADC may also be clocked from an external clock source.

Up to five PX14400-SP boards may be interconnected in a Master/Slave configuration via a ribbon cable that connects at the top of the board. In this configuration the clock and trigger signals from the Master drive the Slave boards synchronize sampling across all boards. Additional boards can be synchronized, even across computer chassis, when using Signatec’s SYNC1500-6 product. The PX14400-SP supports single shot, segmented, and pretrigger triggering modes.


Product Specifications


Product: PX14400 Full Data Sheet
Update: Revision 1.00 - 09/29/2009
File Size: 128 KB



External Signal Connections
     Analog Input, Channel 1: SMA
     Analog Input, Channel 2: SMA
     Clock Input: SMA
     Trigger Input: SMA
     Digital Input / Output: SMA
 
Analog Inputs – Amplifier
     Full Scale Voltage Ranges: 200 mV to 3.0 V in 1dB steps
     Impedance: 50 ohms
     Bandwidth: 100kHz - 200 MHz (Bessel filter)
     SNR (1-200 MHz): 65 dB
     SFDR (@ 100 MHz): 83 dB
 
Analog Inputs – Transformer
     Full Scale Voltage Ranges: 1.1 Volts
     Impedance: 50 ohms
     Bandwidth: 500 kHz to 400 MHz
     SNR (1-200 MHz): 70 dB
     SFDR (@ 100 MHz): 83 dB
 
External Trigger
     Signal Type: digital, TTL signal level
     Impedance: >10k ohms
     Bandwidth: 50 MHz
 
Internal Synthesized Clock
     Frequency Range: 58.0 - 400 MHz
     Resolution: better than 10 PPM
     Accuracy: better than 5 PPM
     Unsettable Ranges: 277-308 MHz
 
External Clock
     Signal Type: sine wave or square wave
     Coupling: AC
     Impedance: 50 ohms
     Frequency: 20 MHz to 400 MHz
     Amplitude: 100 mV p-p to 2.0 V p-p
 
Post ADC Clock Divider
     Divider Settings: 1, 2, 4, 8, 16, 32
 
Reference Clock
     Internal: 10.0 MHz, +/- 5 ppm max.
     External: 10.0 MHz, +/- 50 ppm max (required for lock)
 
Digital Input / Output
     Type: TTL Logic Level (standard)
     Max. Frequency: 200 MHz
     Connection: 50 ohms to FPGA I/O
 
Trigger Modes
     Post Trigger: single start trigger fills active memory
     Pretrigger: single trigger stops acquisition
     Segmented: start trigger for each memory segment
 
Trigger Options
     Pretrigger Samples: samples prior to trigger are stored; Single Channel: 8k max.; Dual Channel: 4k max per channel
 
     Delayed Trigger: delay from trigger to data storage; Up to 64k digitizer clock cycles
 
Memory
     Total Size: 512 Megasamples
     Segment Size: Up to 128 Megasamples
     Segment Re-Arm Time: 150 nanoseconds
     Addressing: DMA transfers from starting address
 
Signatec Auxiliary Bus (Version 4)
     Data Transfer Rates: TBD
     Data Direction: Output only
 
Power Requirements
     +12V: 1.0 Amps max.
     +3.3V: 3.3 Amps max.
 
Absolute Maximum Ratings
     Analog Inputs: +/- 4 volts
     Trigger Input: -0.2 to +4.0 volts DC
     Clock Input: 5 volts peak to peak
     Ambient Temperature: 0 to 50C