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PDA1000 - 1 GHz Data Acquisition Signal Waveform Digitizer PCI DAQ Board
complete PDA1000 Data Sheet,
Operator's Manual, & Software
for your evaluation

| FEATURES |
|
Product Overview
The PDA1000 is the state of the art in ultra high-speed data acquisition waveform capturing systems. This waveform digitizer features an analog bandwidth of DC to 500 MHz and digitization rates of up to 1 GHz. It employs an extraordinary memory depth of 256 megasamples for capturing extremely long events. The entire memory may be used as a giant FIFO for acquiring data directly to either the SAB or PCI bus.
The PDA1000 is a 64-bit DAQ PCI compatible board equipped with standard 'Plug and Play' features common in PCI systems. It is capable of Bus Master DMA data transfers at a sustained rate of 250 megabytes/second. It can also operate in 32-bit PCI slots in which case the transfer rate will be limited to about 120 megabytes per second.
The PDA1000 digitizer board incorporates the advanced Signatec Auxiliary Bus (SAB) that allows for data transfers of up to 500 megabytes/second. This allows for the high-speed transfer of data to fast processor boards, such as Signatec's PMP1000, or other peripherals. The SAB also incorporates device control features for operating the PDA1000 independent of the host bus.
The PDA1000 is equipped with an interconnect port to allow multiple PDA1000 DAQ boards to be interconnected in a Master/Slave configuration. Up to three PDA1000 Slave DAQ boards may be operated with one Master. Master/Slave connections are via a ribbon cable that connects at the top of the board. In this configuration the clock and trigger signals from the Master drive the Slave boards so that data sampling on all boards occurs simultaneously.
The PDA1000 has six software selectable signal amplitude ranges from a maximum of 3.2 volts down to 200 millivolts full scale. Extreme care was taken in the design of the front-end analog circuitry to minimize noise and distortion.
External clock and trigger signals are provided via SMA connectors on the back bracket. Also provided is a user selectable digital output signal for synchronization purposes. Effectively, eleven internal clock frequencies may be selected from 1.0 GHz down to 977 kHz in factors of 2.
The PDA1000 supports single shot, segmented, and pretrigger triggering modes with delayed triggering or pretrigger samples.
Product Specifications
| Input Signals | |
| Analog Signal Input | |
| External Trigger In | |
| External Clock In, Clock Out, Trigger Out | |
| External Connectors: | 3 SMA |
| Digital Output | |
| Synchronized Trigger | |
| ADC Clock Div 8 | |
| External Connectors: | 1 SMA |
| Analog Input | |
| Full Scale Voltage Ranges (p-p): | 200mV, 333mV, 600mV, 1.00V, 1.80V, 3.00V |
| Impedance: | 50 ohms |
| Bandwidth: | 500 MHz |
| Equivalent Noise: | 0.5 lsb RMS (typical) |
| Coupling: | AC or DC |
| External Trigger | |
| Impedance: | 50 ohms / 1k ohms |
| Trigger Level: | +/- 250 mV @ 50 ohms, +/- 2.5 V @ 1k ohm |
| Adjustment Method: | via 8 bit DAC |
| Bandwidth: | 350 MHz @ 50 ohms, 10 MHz @ 1k ohms |
| Coupling: | DC |
| External Clock | |
| Clock In | |
| Signal Type: | sine or square wave |
| Impedance: | 50 ohms to ground |
| Frequency: | 200 MHz to 1 GHz |
| Amplitude: | 100 mV p-p to 2.0 V p-p |
| Clock Out | |
| Type: | TBD |
| Max Frequency: | 250 MHz |
| Suggested Load: | 50 ohms |
| Amplitude: | TBD |
| DC Offset Voltage | |
| 8 bit DAC, +/- 270mV at ADC Input | |
| Digitizer | |
| Voltage Range: | +/- 250 mV full scale |
| Resolution: | 8 bits |
| Linearity, Integral: | +/- 0.5 lsb max. |
| Linearity, Differential: | +/- 0.75 lsb max. |
| Aperture Jitter: | <0.5 pS typical |
| Internal Clock Rates: | 1 GHz down to 976.6 kHz, in factors of 2 |
| Internal Clock Accuracy: | +/- 0.01% |
| Trigger Modes | |
| Post-Trigger: | single start trigger fills active memory |
| Pre-Trigger: | single trigger stops acquisition |
| Segmented: | start trigger for each memory segment |
| Trigger Options | |
| Pre-Trigger Samples: | samples prior to trigger are stored; up to 32K samples |
| Delayed Trigger: | delay from trigger to data storage; up to 512K digitizer clock samples |
| Memory | |
| Active Size: | Up to 256 Megasamples |
| Segment Size: | Up to 128 Megasamples |
| Start Address Setting: | Anywhere in memory |
| Segment Re-Arm Time: | 150 nanoseconds |
| Addressing: | DMA transfers from starting address |
| Memory Address (PC): | Plug and Play selected |
| I/O Addressing | |
| PCI Controller Address: | 64 bytes, Plug and Play selected |
| Control/Status Registers: | 32 bytes, Plug and Play selected |
| Signatec Auxiliary Bus | |
| Data Transfer Modes: | Block or Packet |
| Data Transfer Rates: | 500 MB/s max @ 64 bits |
| Data Direction: | Output only |
| Power Down Features | |
| Off Mode: | Board Deactivated; Power usage less than 350 mW |
| Power Down: | Acquisition circuits deactivated; power reduced by 2/3 |
| Thermal Shutdown: | ADC temp. greater than 65C deactivates power |
| Power Requirements | |
| +12: | 100 mA max |
| -12: | 10 mA max |
| +5: | 2.5A max. (acquisition) ; 0.7A max. (power down) |
| +3.3: | 3A max |
| Absolute Maximum Ratings | |
| Analog Inputs: | +/- 5 volts |
| Trigger Input: | +/- 5 volts |
| Clock Input: | 5 volts peak to peak |
| Ambient Temperature: | 0 to 50C |

